機能

2input NAND gate

信号機能

A_i ＝　入力信号A
B_i ＝　入力信号B
Q_o ＝　出力

記述特徴

NSL記述例

/* ********************************************************** */
declare NAND2 {

    input       A_i ;
    input       B_i ;

    output      Q_o ;

}

/* ************************************************************ */
// Declare module
module NAND2 {
/* ************************************************************ */
// Internal operation signals

/* ************************************************************ */
// Equation

    {
        Q_o = !(A_i & B_i) ;
    }
}
/* ************************************************************ */

Verilog変換例

/*Produced by NSL Core(version=20240424), IP ARCH, Inc. Fri Jun 28 14:12:15 2024
 Licensed to :EVALUATION USER*/
/*
 DO NOT USE ANY PART OF THIS FILE FOR COMMERCIAL PRODUCTS.
*/

module NAND2 ( p_reset , m_clock , A_i , B_i , Q_o );
  input p_reset, m_clock;
  wire p_reset, m_clock;
  input A_i;
  wire A_i;
  input B_i;
  wire B_i;
  output Q_o;
  wire Q_o;

   assign  Q_o = (~(A_i&B_i));
endmodule

/*Produced by NSL Core(version=20240424), IP ARCH, Inc. Fri Jun 28 14:12:15 2024
 Licensed to :EVALUATION USER*/